1. Field of the Invention
This invention relates to semiconductor processing equipment and more particularly to plasma ashing equipment.
2. Description of the Related Art
Certain types of equipment used in the ashing process for the removal of photoresist during the processing of integrated circuits and/or micro-electromechanical-mechanical (MEMS) devices, exhibit an ash rate non-uniformity from the edge-to-center of the wafer. This effect, caused by a semi-stagnation of the plasma gas flow at the center of the wafer as compared to the outer edge of the wafer, results in a decrease in the rate of photoresist removal from the edge to center of the wafer. In the past, this edge-to-center ash rate variation has been minimized by manipulation of several different processing parameters, including pressure, temperature, power, bias direction, and gas concentrations. Typically, these parameters are optimized for a particular process and saved as the process recipe.
Down-streaming plasma reactors often employ grid plates between the plasma generation region and the target wafer. These grid plates are used to ensure that only neutral reactive specie, for example, oxygen and fluorine atoms, make their way to the work piece (target wafer) to ash away the photoresist. Neutral reactive specie minimizes the unwanted side effects; i.e., ion bombardment on CMOS transistors and other component structures. Grid plates are made of metal (example aluminum) with drilled holes to allow the excited gas or plasma to pass though to the target wafer. These plates are positioned such that non direct line-of-sight exist for the gas or plasma to reach the wafer.
A diagram for a down-streaming plasma reactor is shown in FIG. 1a. This type asher employs grid plates 2 and 3, with a separation gap 5, between the plasma generation region and the work piece (wafer). The grid plates consist of metal plates with equal sized holes 6, as shown in FIG. 1b. The upper grid plate 2 and lower grid plate 3 are aligned so there is no direct path for the gases to pass through to the wafer. The plasma gases 1 are applied to the upper grid plate 2 and exit through the holes in the lower grid plate 3. The purpose of the grip plates is to ensure that only neutral reactive specie, such as oxygen and fluorine atoms, make their way to the wafer where the photoresist is to be ashed away. These neutral reactive specie minimize unwanted side effects; i.e., ion bombardment which is destructive to the CMOS transistors and other structures on the wafer. However, as mentioned above, the grid approach can cause stagnation of gases towards the center of the wafer, which cause a faster rate of photoresist removal near the edges of the wafer. This in turn can be destructive to the product being processed.
There is a need to improve the plasma ashing process to better compensate for this non-uniformity in the photoresist removal rate. This variation in ash rate across the wafer is further compounded as wafer size is increased. With 300 mm diameter wafers expected to become the norm in the not too distant future, ash rate uniformity will become even more critical. The invention disclosed herein addresses this need.
U.S. Pat. No. 5,948,283 is an example to one approach to addressing this problem by providing supplemental heat to the wafer in treatment.